A fundamental structure of a conventional bipolar transistor is shown in FIG. 17. That is, in the bipolar transistor, a P-type base region 12 is formed in a surface layer of an N-type semiconductor substrate 1 and an N-type emitter region 13 is formed in the P-type base region 12. A base electrode 15 and an emitter electrode 16 are in contact with the base region 12 and the emitter region 13, respectively. A collector electrode is to be formed at the back surface side of the N-type semiconductor substrate 1 through an N+-type region 14. A numerical mark 17 indicates an insulation film.
In order to increase a current amplification factor, an impurity concentration in the base region 12 is necessary to be low. If the impurity concentration is excessively lowered, however, a contact between the base region 12 and the base electrode 15 works as a Schottky junction, which makes it impossible to obtain transistor characteristics. Therefore, a P+-region 18 for formation of an ohmic junction is formed at a contact region of the base region 12, with which the base electrode 15 is in contact.
Further, in a transistor which requires a large current in operation, an area and perimetric length of an emitter are increased so as to reduce a current density since a magnitude of a collector current depends mainly on the area and perimetric length of an emitter. Therefore, as shown in pattern examples of an emitter region 13 of FIGS. 17 to 20, a bipolar transistor with a multi-emitter structure or a multi-base structure has been considered.
FIG. 18 shows a structure of a bipolar transistor of a mesh emitter (multi-emitter) type. In this transistor, insular emitter regions 13 are arranged in a grid pattern, being embedded in a base region 12 formed in the surface layer of a semiconductor substrate 15. Further, an emitter electrode (not shown) is in common contact with the insular emitter regions 13.
FIG. 19 shows a structure of a bipolar transistor of a ring emitter (mesh base; multi-base) type. In this transistor, an broadly extended emitter region 13 are formed in a base region 12 formed in the surface layer of a semiconductor substrate 1. In such a large area emitter region 13, the base region 12 are exposed as islands arranged in a grid pattern. Further, contacts to connect a base electrode (not shown) and the base region 12 are effected at the exposed portions.
FIG. 20 shows a structure of a bipolar transistor of a stripe emitter type. In this structure, a plurality of long, narrow emitter regions 13 are arranged in almost parallel, being embedded in a base region 12 extended over the surface layer of a semiconductor substrate 1.
As described above, when, in these structures, an impurity concentration is low in a base region but high in a contact region of an electrode thereof, electrons, which are minority carriers, are blocked by a P/P+ junction between the base region 12 and a P+-type region 18 and in a switching operation, electrons are accumulated in the base region 12. This accumulation of electrons comes with a problem, since a switching loss becomes large, thereby not only preventing a high speed switching, (especially extending an off time,) but causing increase in power consumption.
Further, in transistors of a mesh emitter type shown in FIG. 18 and a ring emitter type shown in FIG. 19, safe operation areas of both types are comparatively narrow and withstand voltages are not necessarily sufficient. For the reasons, there arises a problem, since a sufficient current cannot be supplied to a load.
Furthermore, with a stripe emitter type of FIG. 20 being adopted, a withstand voltage is improved, but a case arises where a load driving ability is not sufficient. Among other points, a switching time of a transistor of this stripe emitter type is good compared with those of a mesh emitter type and a ring emitter type, but there arises a case where a further higher speed switching operation is required.
It is an object of the invention to provide a semiconductor device with a bipolar transistor enabling not only a high speed switching operation but reduction in power consumption.
It is another object of the invention to provide a semiconductor device with a bipolar transistor enabling a safe operation area to be wider.
It is still another object of the invention to provide a semiconductor device with a bipolar transistor enabling a reduction in voltage in an on state to be realized.